Solder reflow during the assembly of flip-chip packages is widely adopted in the electronic packaging industry. The interconnects of flip-chip silicon dies are commonly made of solder balls or bumps in area-array arrangement. The die is aligned and accurately placed onto a substrate such as a printed wiring board (“PWB”) so that the solder balls land on the solder pads of the substrate, from where the interconnects of the die are connected to the electrical circuit of the substrate. The solder pads comprise copper trace circuitry (with thickness of about 18 μm) coated with nickel (with thickness of about 6 μm) and gold (with thickness of less than 0.1 μm). An appropriate amount of solder flux will be applied to the soldering surfaces prior to the die placement process. Application of solder flux can promote wetting between the solder balls and the solder pads of the substrate during the reflow process. A reflow oven provides a well-controlled heating and cooling profile in order to ensure reliable solder-joint formation during reflow and solidification of the solder joint. The self-alignment characteristics of solder reflow allows a less accurate and faster pick-and-place machine to be used in the assembly process.
The above batch assembly process has proven to be productive and is widely adopted in the manufacturing of various flip-chip packages. The solder reflow process is applicable if the pitches of the solder balls are large enough, say more than 150-200 μm. At these ball pitches, a fairly accurate but high throughput flip-chip bonder can be used to realize the pick-and-place process since the self-alignment characteristics of solder reflow can help correct any die placement errors. However, when the pitches of the interconnects are further reduced to less than 150 μm, bridging failure of solder joints during the reflow process may occur.
FIG. 1 is a side view of a flip-chip die 10 with solder-capped copper pillar 12 interconnects bonded onto a substrate 14. The electrical interconnects of the flip-chip die 10 are redistributed by its redistribution layer. The interconnects are redistributed to an area array of copper pillars 12 having pitch P1 which are matched with that of the pad pitch of the solder pads 16 on the high density interconnect substrate 14. An interconnect on the flip-chip die 10 comprises the copper pillar 12 with a solder cap 18 at its tip. The tin-based solder (Sn, SnAg, SnAgCu) of the solder cap 18 melts and wets the solder pad 16 of the substrate 14 to the solder joints during the soldering process. The bump pitch P1 for state of-the-art fine-pitch flip-chip bonding on substrates (which can be made from BT resin or other laminated materials) is about 120-150 μm.
If the fine-pitch flip-chip die 10 is bonded onto redistribution interposers 20 (which may be made from silicon, glass or ceramics), the pad pitch P2 can be as low as 40-60 μm, as shown in FIG. 2, which is a side view of the fine-pitch flip-chip die 10 with solder-capped copper pillar 12 interconnects bonded onto a substrate 14A with a redistribution interposer 20. The redistribution interposer 20 containing electrical routings and through-vias 28 redistributes the fine-pitch P2 interconnects of solder caps 18 to a much larger pitch P3 (more than 200 μm) for the area array of the solder balls 26 on the substrate 14A. Therefore, the pad pitch P2 of solder pads 22 of the redistribution interposer 20 facing the fine-pitch flip-chip die 10 can be as small as 40-60 μm but the pad pitch P3 of solder pads 24 on the bottom side of the redistribution interposer 20 is greater than 200 μm, which matches the pad pitch of the solder pads 16A on the substrate 14A.
One way to reduce the chance of bridging of the solder balls 26 is to reduce the solder volume by using solder-capped copper pillars 12 to replace the solder balls 26 as the interconnects as shown in FIGS. 1 and 2. The dimensions of the copper pillar 12 (height and width) and the thickness of the solder cap 18 play important roles in the design of reliable joints. Even though this design can reduce solder bridging failure for fine-pitch flip-chip packages, it introduces new problems for the manufacturing process. Firstly, the self-alignment process of the solder joints during reflow processes may not be able to take place as solder volume is much reduced. Hence, a more precise flip-chip pick-and-place machine is needed for the assembly process. Secondly, the volume control of these solder-capped solder will be very critical. In order to ensure all the solder caps 18 are in full contact with the solder pads 16 on the substrate 14 when solder joints are formed, a sufficiently high compressive force should be applied on the flip-chip die 10 at the initial stage of the bonding cycle. A thermal compression (TC) bonding process instead of a solder reflow process has to be used for bonding the fine-pitch flip-chip die 10 with solder-capped copper pillar 12 interconnects onto the substrate 14 with fine-pitch solder pads 16.
The process flow of the conventional thermal compression (TC) process for fine-pitch flip-chip dies 10 with solder-capped copper pillar 12 interconnects consists of two major assembly processes, namely, a precise alignment process followed by thermal compression bonding. In a conventional setup, these two processes have to be performed consecutively one after the other since any disturbance may displace the flip-chip die 10 from its accurate alignment with the fine-pitch solder pads 16 on the substrate 14 or solder pads 22 on the redistribution interposer 20. The process starts with transporting a substrate 14 onto an input position of a bonding station which is maintained at a pre-heated temperature T1 below the melting temperature Tm of solder. A bonding tool picks up a fine-pitch flip-chip die 10 from the wafer table. The precision alignment of the fine-pitch flip-chip die 10 is done with the help of up-looking and down-looking vision alignment systems. The fine-pitch flip-chip die 10 will be positioned in such a way that its solder caps 18 will be aligned in accordance with the position and orientation of the solder pads 16 on the substrate 14 or the solder pads 22 on the redistribution interposer 20. At the end of the alignment process, the flip-chip die 10 is held by the bonding tool to keep its alignment position and then placed onto the substrate 14 (or the redistribution interposer 20) with the application of an appropriate compressive force F1 which ensures the good contact of the solder caps 18 and solder pads 16, 22.
The process time t1 for the precision alignment process is in the order of a few seconds (2-3 seconds) for alignment accuracy of up to +/−1 μm. At the beginning of the thermal compression bonding process, the flip-chip die 10 held by the bonding tool is elevated to temperature T2 which exceeds the melting temperature Tm of the solder on the copper pillars 12. This can be achieved by using a pulsed heater installed on the bonding tool. When the solder on the copper pillars 12 reaches its melting temperature Tm, the compressive force acting on the flip-chip die 10 will be reduced to force F2 to prevent the collapsing of the solder joints during reflow. The solder on the tip of the copper pillar 12 then wets the solder pads 16 of the substrate 14 (or the solder pads 22 of the redistribution interposer 20). The bonding tool starts cooling and its temperature drops below temperature Ts at which the solder will be solidified. Solder joints will form between the copper pillars 12 of the flip-chip die 10 and the solder pads 16 of the substrate 14 (or the solder pads 22 of the redistribution interposer 20). At the end of this thermal compression bonding cycle, the bonded flip-chip die 10 on the substrate 14 (or on the redistribution interposer 20) will be transported to an output station of the bonder. The process time t2 for this thermal compression bonding cycle is in the order of 3 to 8 seconds, which in practice depends on how fast the bonding tool can be heated up and cooled down.
One major disadvantage of the conventional thermal compression bonding process is its low overall throughput. The pick-and-place machine should be able to align the flip-chip die 10 precisely in accordance with the locations of pad openings for the solder joints on the substrate 14. The alignment accuracy requirement for this process has to be better than +/−2 μm at 6-sigma. A state-of-the-art thermal compression bonder can achieve +/−1 μm alignment accuracy within a few seconds (2-3 seconds). After this accurate alignment, the bonding tool holding the flip-chip die 10 is then heated up and cooled down by a pulse heater according to a pre-determined temperature profile during which the solder at the tip of the copper pillars 12 melt and then solidify to form solder joints on the solder pads of the substrate. The compressive force acting on the flip-chip 10 has to be controlled in such a way that a desired stand-off height of the solder joint can be maintained. Since heating and cooling of the bonding tool takes time, this thermal compression bonding cycle takes at least 3 to 8 seconds. Hence, the cycle time for the overall alignment and bonding process is around 5 to 10 seconds and the throughput of the process is around 500 units per hour. The throughput of this process has to be increased in order for it to gain popularity for volume production.